Velocity Automation/Applications EDA to ATE Conversion - Advantest

About the Role

We are seeking a highly capable Applications Engineer to support and advance Velocity-based EDA-to-ATE conversion flows for leading semiconductor customers worldwide.

This role focuses on implementing and optimizing automated test conversion flows spanning design, DFT, simulation, and production ATE environments. The engineer will work directly with customer engineering teams, DFT architects, and internal Velocity developers to deploy advanced automation methodologies that accelerate First-Time-Right Silicon and reduce Time-to-Market.

The ideal candidate has hands-on experience with semiconductor test conversion environments including Velocity, Test Insight, VTRAN, and/or TSSI, along with strong understanding of DFT, STIL/WGL formats, and ATE production workflows.

As the industry moves toward AI-assisted engineering automation, this role will also leverage AI-driven productivity tools and intelligent automation frameworks to improve conversion quality, debug efficiency, and deployment scalability.

Key Responsibilities

• Develop and optimize automated conversion methodologies for STIL, WGL, EVCD, IJTAG, and SSN environments
• Support conversion and debug flows targeting Advantest V93000/ST8 platforms
• Analyze and resolve conversion, timing, protocol, and pattern integration issues
• Work directly with customer DFT, Design, Validation, and Test Engineering teams
• Develop automation scripts and utilities using Python, Java, and related technologies
• Support AI-assisted engineering workflows for:
• Assist in development of scalable conversion infrastructure and peak-bandwidth automation environments
• Collaborate with Velocity core engineering on feature enhancements and customer requirements
• Support customer training, deployment, and technical workshops globally

Required Qualifications

• Experience with semiconductor EDA-to-ATE conversion environments
• Hands-on experience with one or more of the following:
• Strong understanding of DFT and semiconductor test methodologies
• Experience with STIL, WGL, EVCD, or related pattern formats
• Programming experience in Python, Java, Perl, and/or C++
• Strong debugging and analytical problem-solving skills
• Ability to work directly with customers in high-pressure production environments
• Strong communication and technical presentation skills

Preferred Experience

• Knowledge of IJTAG, SSN, EDT, JTAG, or scan architectures
• Experience with Siemens Tessent or related DFT tool flows
• Experience developing automation infrastructure for large-scale regression or conversion systems