remote
Technical Lead Manager, Machine Learning, Memory Subsystem Design - Google
ML Engineer
Lead a high‑impact team designing and verifying next‑generation DRAM and HBM memory subsystems, driving innovation in machine‑learning workloads while mentoring engineers and shaping architecture strategy.
About the role
Key Responsibilities
- Architect and validate DRAM‑based and HBM‑based memory subsystems for machine‑learning accelerators.
- Lead a multidisciplinary team of designers and verification engineers, fostering growth and technical excellence.
- Collaborate with cross‑functional partners to define performance, power, and reliability targets.
- Drive process improvements in design flow, verification methodology, and documentation.
- Mentor junior staff, conduct performance reviews, and support career development.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 15+ years of semiconductor design or verification experience, with a focus on memory subsystems.
- 6+ years of people‑management experience, developing and leading engineering teams.
- Proven expertise in DRAM and HBM architecture, design, and validation.
- Strong communication skills and a track record of delivering complex projects on schedule.