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Staff Engineer, Post Silicon Validation - Renesas
Software Engineer
Lead post‑silicon validation for advanced semiconductor products, driving end‑to‑end verification, debugging, and performance tuning using SystemVerilog, UVM, and FPGA platforms to ensure reliability and meet stringent automotive and industrial standards.
About the role
Key Responsibilities
- Design, implement, and maintain comprehensive post‑silicon validation plans for complex ASIC and SoC products.
- Develop and execute advanced testbenches in SystemVerilog/UVM, leveraging FPGA prototypes and emulation platforms.
- Analyze silicon data, debug hardware issues, and collaborate with design, firmware, and software teams to resolve defects.
- Drive performance optimization, power analysis, and functional coverage metrics to meet product specifications.
- Mentor junior engineers, review code, and establish best practices for verification and debugging workflows.
Requirements
- 10+ years of experience in semiconductor post‑silicon validation, with deep expertise in ASIC/SoC verification.
- Proficient in SystemVerilog, UVM, and RTL debugging techniques.
- Hands‑on experience with FPGA prototyping, emulation, and silicon debug tools.
- Strong analytical skills, ability to interpret complex data, and troubleshoot hardware issues.
- Excellent communication skills and a collaborative mindset for cross‑functional teams.
Skills
pythonlinuxverilogagileexcel