SR PRINCIPAL ENGINEER, FE CPIE RAM QUALITY and OPNS ENGINEERING

We are seeking a highly experienced and skilled Principal Engineer to lead our Front-End Chip Package Interface Engineering (FE CPIE) RAM Quality and Operations Engineering team. The successful candidate will be responsible for driving innovation and excellence in our RAM quality and operations engineering capabilities.

The ideal candidate will have a strong background in Python, Machine Learning, and AWS, with experience in FE CPIE, RAM Quality, and Operations Engineering. They will be a strategic thinker with excellent communication and leadership skills, able to collaborate with cross-functional teams to drive business outcomes.

This is a senior leadership role that requires a high degree of technical expertise, business acumen, and leadership skills. The successful candidate will be responsible for developing and executing strategies to improve RAM quality and operations engineering capabilities, and will be expected to mentor and develop junior engineers.