onsite
SoC Design and Integration Engineer - Qualcomm
Implementation Engineer
Lead the design and integration of system‑on‑chip solutions, driving RTL development, physical implementation, and timing closure for next‑generation wireless and PC ASICs using Verilog and SystemVerilog.
About the role
Key Responsibilities
- Develop and review RTL code for SoC blocks using Verilog and SystemVerilog, ensuring functional correctness and performance targets.
- Lead physical design activities, including floorplanning, placement, routing, and timing analysis to achieve target clock speeds and power budgets.
- Collaborate with IP teams and external vendors to integrate third‑party IP, resolve interface issues, and maintain design consistency.
- Perform design rule checks, sign‑off, and prepare detailed documentation for manufacturing and verification.
- Support FPGA prototyping and early validation to accelerate design cycles and reduce risk.
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 3+ years of ASIC/SoC design experience in a fabless semiconductor environment.
- Proficiency in RTL coding (Verilog/SystemVerilog), synthesis, and physical design tools (Synopsys, Cadence).
- Strong understanding of timing closure, power optimization, and design for manufacturability.
- Excellent analytical, problem‑solving, and communication skills.