As a Senior Member of the Technical Staff (SMTS) in IO/Clock Design Engineering, you will be responsible for designing and developing high-speed IO and clock circuits for leading-edge semiconductor products. You will work closely with cross-functional teams to develop and implement innovative design solutions that meet the needs of our customers.
Key Responsibilities:
- Design and develop high-speed IO and clock circuits using Python and Verilog/VHDL.
- Collaborate with cross-functional teams to develop and implement innovative design solutions.
- Develop and maintain design documentation and test plans.
- Work with manufacturing and test teams to ensure smooth production and testing of products.
- Stay up-to-date with industry trends and emerging technologies to ensure our products remain competitive.
Requirements:
- Master's degree in Electrical Engineering or related field.
- Minimum 8 years of experience in IO/Clock design engineering.
- Strong understanding of digital and analog circuit design principles.
- Experience with low power design and clock domain crossing.
- Excellent communication and collaboration skills.