onsite
Senior SOC Design Engineer, Custom Silicon
Senior SOC Design Engineer, Custom Silicon
Join NVIDIA as a Senior SOC Design Engineer to define and implement SoC micro-architecture, perform RTL design of complex SoC blocks, and drive continuous improvements in design methodologies. This role involves close collaboration with architecture, verification, and physical design teams to craft next-generation Custom Silicon for various products.
About the role
About the team:
Our team is revolutionizing the computing industry, playing a pivotal role in fields like artificial intelligence, deep learning, and autonomous vehicles. We are seeking extraordinary SoC Design Engineers to join us in crafting the next generation of Custom Silicon, impacting a diverse range of products from enterprise solutions to consumer devices and automotive platforms. If you're a self-starter with a passion for innovation and a knack for problem-solving, we want you on our team.
What you'll be doing:
- Define and implement SoC micro-architecture.
- Perform RTL design of complex SoC blocks and top-level integration.
- Collaborate closely with architects, verification, and physical design teams.
- Analyze and debug complex system-level issues.
- Drive continuous improvements in design methodologies and flows.
What we need to see:
- BS or MS degree in Electrical Engineering, Computer Engineering, or a related field.
- 8+ years of experience in SoC design.
- Expertise in SoC architecture and micro-architecture definition.
- Strong proficiency in RTL design (Verilog/SystemVerilog).
- Solid understanding of ASIC design flows and methodologies.
- Experience with timing analysis, CDC (Clock Domain Crossing), and reset domain crossing.
- Familiarity with UPF (Unified Power Format) and power intent.
- Excellent problem-solving, analytical, and debugging skills.
- Strong communication and collaboration abilities.
Ways to stand out from the crowd:
- Experience with scripting languages (Python, Perl) and/or C++.
- Proven track record of successful SoC tape-outs.
- Deep understanding of low-power design techniques.
- Familiarity with various bus protocols and memory interfaces.