Senior Semiconductor Reliability Engineer - Advanced Silicon & Packaging

About Graphcore

At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.

Job Summary

We are seeking a Senior Semiconductor Reliability Engineer to lead reliability strategy and execution across advanced silicon nodes and advanced packaging technologies, spanning both pre-silicon and post-silicon phases. This role is responsible for ensuring robust product reliability from technology selection and design enablement through silicon bring-up, qualification, and high-volume manufacturing.

The successful candidate will work at the intersection of device physics, circuit design, packaging, and manufacturing, providing technical leadership on reliability risk assessment, modeling, qualification, and failure analysis for complex, high-performance devices.

The Role

As a Senior Reliability Engineer, you will lead reliability strategy and qualification activities for advanced AI silicon and package technologies. You’ll work across pre-silicon analysis, post-silicon qualification, and failure analysis, partnering closely with silicon, packaging, manufacturing, and quality teams.

This role combines deep technical expertise with cross-functional leadership and offers the opportunity to influence reliability methodology for cutting-edge AI hardware platforms.

Responsibilities and Duties

• Define reliability requirements for advanced silicon nodes and package platforms
• Perform pre-silicon reliability risk assessments across silicon, interconnect, and package technologies
• Evaluate reliability mechanisms including EM, TDDB, BTI, HCI, BEOL, and silicon-package interaction
• Support design reviews, guard-banding, and reliability sign-off activities
• Develop and execute qualification plans aligned with JEDEC and customer requirements
• Lead HTOL, thermal cycling, thermal shock, and reflow qualification testing
• Drive correlation between pre-silicon modelling and post-silicon qualification results
• Lead root-cause analysis of silicon and package-related failures
• Utilize X-ray and CSAM analysis to diagnose package defects including delamination, voiding, and cracking
• Work with foundries, OSATs, and reliability labs to resolve reliability and manu