QA Engineer
Senior NPI Test Engineer responsible for designing and executing mixed-signal, high-speed digital, and RF test solutions for SiGe BiCMOS technologies, ensuring product quality and performance across Semtech’s semiconductor portfolio.
Location: Taiwan
Our Team:
Semtech 's Global Test Engineering team is a world-class organization of innovative engineers who enable the success of our entire semiconductor portfolio through cutting-edge test solutions and methodologies. We are the technical backbone that ensures every Semtech product meets the highest standards of quality, reliability, and performance. Our team spans multiple sites globally and serves as the center of excellence for test innovation, working closely with all business units to deliver breakthrough test capabilities. We specialize in mixed-signal, high-speed digital, and RF test development, with particular expertise in advanced SiGe BiCMOS technologies. Our engineers drive competitive advantage through innovative test architectures, methodologies, and continuous improvement initiatives that directly impact Semtech 's bottom line.
Job Summary:
We are seeking a Senior NPI Test Engineer to serve as a key technical contributor for new product introduction test development in our mixed-signal product portfolio. This role requires a skilled and experienced engineer who can develop and implement comprehensive test solutions spanning from early silicon validation through high-volume production. The ideal candidate will apply testability best practices across assigned programs, lead technical workstreams within multi-disciplinary projects, and deliver robust test methodologies that enable next-generation high-speed communication products operating at 200Gbps and beyond.
Primary responsibilities:
Technical Leadership & Architecture (30%
Develop and implement test strategies for complex mixed-signal SiGe products from concept through production maturity
Lead development of innovative test methodologies for high-speed SerDes, CDRs, and signal conditioning products
Contribute to DFT/testability requirements in IC architecture, applying established standards and best practices
Develop and implement advanced test techniques for products operating at >200Gbps data rates
Create reusable test IP, libraries, and frameworks that accelerate NPI cycles across product families
Perform technical risk assessment and mitigation strategies for test coverage and quality
Cross-functional NPI Support (30%)
Represent test engineering in product architecture reviews and gate meetings
Partner with IC design teams from concept phase to ensure optimal test coverage and manufacturability
Lead test readiness reviews with stakeholders, providing strategic recommendations
Collaborate with Product Engineering to define characterization strategies and correlation methodologies
Interface with customer quality teams on test specifications and coverage requirements
Architect and launch test solutions that achieve test time targets for complex mixed-signal devi
Posted June 21, 2026