remote
Senior DFT Engineer - Hardware - NVIDIA
Software Engineer
Lead advanced Design-for-Test (DFT) initiatives for high‑performance ASIC and FPGA products, driving test coverage, yield, and reliability using industry‑leading tools and methodologies.
About the role
Key Responsibilities
- Design, implement, and validate DFT solutions (scan, ATPG, BIST) for complex ASIC and FPGA blocks.
- Collaborate with RTL, synthesis, and physical teams to integrate DFT features early in the design flow.
- Develop and maintain testbenches, scripts, and automation pipelines for DFT verification.
- Analyze test results, debug failures, and provide actionable recommendations to improve yield and reliability.
- Stay current with emerging DFT tools and industry best practices, and mentor junior engineers.
Requirements
- 5+ years of experience in DFT for ASIC/FPGA design environments.
- Strong proficiency in Verilog/VHDL, RTL simulation, and UVM methodology.
- Hands‑on experience with commercial DFT tools (e.g., Synopsys DFT, Cadence Incisive, Mentor Questa).
- Solid understanding of timing closure, power analysis, and design for manufacturability.
- Excellent problem‑solving skills and ability to work cross‑functionally in a fast‑paced setting.