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Senior AI Cluster Hardware Engineer - AMD
Embedded Systems Engineer
Senior AI Cluster Hardware Engineer driving the design, verification, and optimization of next‑generation AI accelerators, leveraging ASIC, FPGA, and GPU technologies to deliver high‑performance, energy‑efficient compute solutions.
About the role
Key Responsibilities
- Lead the end‑to‑end design of AI accelerator silicon, from architecture specification to layout and tape‑out.
- Develop and execute comprehensive hardware verification plans using VHDL/Verilog and simulation tools.
- Collaborate with software, firmware, and system teams to define performance, power, and thermal targets.
- Analyze and optimize silicon performance, power, and thermal budgets through detailed post‑layout analysis.
- Drive continuous improvement of design flows, methodologies, and tooling for AI cluster hardware.
Requirements
- BS/MS in Electrical Engineering, Computer Engineering, or related field with 8+ years of ASIC/FPGA design experience.
- Proficient in VHDL/Verilog, RTL design, and hardware verification methodologies.
- Strong understanding of GPU architecture, high‑performance computing, and AI inference workloads.
- Experience with silicon design tools (Cadence, Synopsys, Mentor) and thermal analysis.
- Excellent problem‑solving skills, strong communication, and a collaborative mindset.