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Security IP Verification - Senior Lead Engineer - Qualcomm
Software Engineer
Lead the verification of security IP blocks for next‑generation hardware, driving test strategy, coverage, and defect resolution using SystemVerilog, UVM, and ASIC/FPGA platforms.
About the role
Key Responsibilities
- Architect and execute comprehensive verification plans for security IP, ensuring compliance with industry standards and internal quality metrics.
- Develop and maintain high‑coverage SystemVerilog/UVM testbenches, leveraging RTL, ASIC, and FPGA platforms to validate functional and performance requirements.
- Collaborate closely with design, firmware, and hardware teams to troubleshoot complex bugs, provide root‑cause analysis, and recommend design improvements.
- Mentor and lead a team of verification engineers, fostering best practices, code reviews, and continuous skill development.
- Drive integration of security IP into larger system blocks, coordinating with packaging, test, and production teams to achieve on‑time delivery.
Requirements
- 10+ years of experience in hardware verification, with a strong focus on security IP.
- Expertise in SystemVerilog, UVM, and RTL design methodologies.
- Proven track record of leading verification projects from concept through production.
- Strong analytical skills, excellent communication, and ability to work in a fast‑paced, cross‑functional environment.