onsite
Principal Test Engineer - Marvell Technology
QA Engineer
Lead test development for silicon features in a high‑performance operations group, building automated frameworks, driving verification, and mentoring engineers using Python, C++, SystemVerilog and Linux environments.
About the role
Key Responsibilities
- Design, develop, and maintain automated test infrastructure for silicon validation across enterprise, cloud, and AI workloads.
- Lead verification efforts using SystemVerilog and UVM, creating test plans, testbenches, and coverage models.
- Collaborate with hardware, firmware, and software teams to define test requirements and ensure robust feature validation.
- Develop custom scripts and tools in Python and C++ to streamline test execution, data collection, and analysis on Linux platforms.
- Mentor junior engineers, conduct code reviews, and promote best practices in test methodology and debugging.
Requirements
- Bachelor’s or higher in Electrical Engineering, Computer Engineering, or related field with 8+ years of silicon test/verification experience.
- Strong proficiency in Python, C++, SystemVerilog, and UVM for building scalable test environments.
- Hands‑on experience with Linux‑based test automation, continuous integration, and debugging complex ASIC designs.
- Proven ability to lead cross‑functional teams, drive technical decisions, and deliver high‑quality test solutions on schedule.
- Excellent problem‑solving skills and ability to communicate technical concepts clearly to diverse audiences.