onsite
Principal Digital Hardware Engineer - Hidden Level Inc
Embedded Systems Engineer
Lead the architecture and development of next‑generation digital hardware for advanced RF sensing platforms, driving ASIC/FPGA design, high‑speed interfaces, and integration support for defense and commercial applications.
About the role
Key Responsibilities
- Define and execute the digital hardware strategy for cutting‑edge RF sensing systems, from concept through silicon.
- Lead architecture, design, and verification of ASIC and FPGA blocks using Verilog and VHDL, ensuring performance, power, and area targets.
- Develop high‑speed serial interfaces (e.g., JESD204, LVDS, PCIe) and integrate them with RF front‑ends and signal‑processing pipelines.
- Collaborate with cross‑functional teams—RF, firmware, software, and system engineers—to deliver end‑to‑end sensor solutions and support customer integration.
- Mentor senior engineers, establish best practices, and drive continuous improvement in design flow, verification methodology, and documentation.
Requirements
- 10+ years of experience in digital ASIC/FPGA design for high‑performance, high‑speed applications.
- Proficiency in hardware description languages (Verilog, VHDL) and modern verification environments (UVM, SystemVerilog).
- Strong background in high‑speed serial protocols, clocking, and signal integrity for RF‑centric systems.
- Hands‑on experience with silicon bring‑up, board bring‑up, and debugging using oscilloscopes, logic analyzers, and protocol analyzers.
- Proven ability to lead technical teams, influence architecture decisions, and communicate complex concepts to both technical and non‑technical stakeholders.