onsite
PCIe / CXL and HSIO Validation Engineer - AMD
Software Engineer
Lead validation of PCIe, CXL, and HSIO interfaces on AMD silicon, designing test plans, automating test flows, and ensuring compliance with industry standards to accelerate AI, data center, and gaming products.
About the role
Key Responsibilities
- Design, develop, and execute comprehensive validation plans for PCIe, CXL, and HSIO interfaces on silicon prototypes.
- Automate test flows using scripting languages (Python, Bash) and test frameworks to increase coverage and reduce cycle time.
- Collaborate with design, firmware, and software teams to troubleshoot and resolve interface issues.
- Analyze test data, generate detailed reports, and provide actionable feedback to engineering teams.
- Maintain and enhance validation infrastructure, including test benches, hardware platforms, and test management tools.
Requirements
- 3+ years of experience validating high-speed serial interfaces (PCIe, CXL, HSIO) in silicon or FPGA environments.
- Strong knowledge of serial link protocols, signal integrity, and timing analysis.
- Proficiency in Python or similar scripting languages for test automation.
- Experience with test management tools (e.g., TestRail, JIRA) and version control (Git).
- Excellent problem‑solving skills and ability to work cross‑functionally in a fast‑paced environment.