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Machine Learning Solutions Architect, Hardware
Machine Learning Solutions Architect, Hardware
As a Machine Learning Solutions Architect, Hardware at Waymo, you will design and optimize machine learning hardware solutions for autonomous driving technology. Your responsibilities include analyzing workloads, architecting ML solutions, and collaborating with cross-functional teams to enhance performance and efficiency of the compute platform.
About the role
About the Role
Waymo's Compute Team delivers the compute platform responsible for running the fully autonomous vehicle's software stack. This involves architecting and creating high-performance custom silicon, developing system-level compute architectures, and collaborating with other teams to optimize hardware and software for maximum performance. This is a multidisciplinary team focused on one of the world's highest performance automotive compute platforms.
In this role, you will report to a Hardware Engineering Manager.
Responsibilities
- Analyze workloads and map them efficiently to hardware, proposing novel HW-friendly implementations and projecting performance.
- Architect, simulate, and design machine learning solutions for autonomous driving technology.
- Work closely with compiler and model developers to influence engineering trade-offs and future model architectures.
- Build scalable tools for simulator modeling and performance evaluation.
- Interact with cross-functional engineering teams to identify opportunities and requirements.
Requirements
- BS degree in Computer Science or Computer Engineering or similar relevant technical field, or equivalent practical experience.
- 3+ years on designing/architecting complex, high performance architectures - CPUs, GPUs and/or ML accelerators - in the industry or through doctoral research.
- 1+ years experience with machine learning architectures, acceleration and model optimization.
- Strong C++ programming and algorithmic problem solving skills.
Preferred Qualifications
- 1+ years modeling high performance architectures in cycle-aware simulators.
- Track record of analyzing workloads and architecting, delivering novel HW+SW solutions to vastly improve performance, efficiency.
- Familiarity with ML model architectures and their compute characteristics (bottlenecks, optimization opportunities).
- Experience with microarchitecture design (SystemVerilog or HLS).