remoteonsite
Hardware Validation Engineer - Persistent Systems
Software Engineer
Hardware Validation Engineer responsible for designing and executing test plans for FPGA and ASIC products, leveraging UVM, Python scripting, and JTAG interfaces to ensure design integrity and performance.
About the role
Key Responsibilities
- Develop and maintain comprehensive test plans and testbenches for FPGA and ASIC designs using UVM methodology.
- Execute functional, performance, and regression tests, analyze results, and document findings.
- Collaborate with design, firmware, and software teams to troubleshoot and resolve hardware issues.
- Automate test workflows with Python scripts and integrate JTAG-based debugging tools.
- Prepare detailed test reports and provide actionable recommendations for design improvements.
Requirements
- BS/MS in Electrical Engineering, Computer Engineering, or related field.
- 3+ years of experience in hardware validation for FPGA/ASIC products.
- Proficiency in UVM, SystemVerilog, and Python scripting.
- Strong knowledge of JTAG, SPI, I2C, and other hardware interfaces.
- Excellent analytical, problem‑solving, and communication skills.