FPGA Verification Engineer - BTA Design Services

Key Responsibilities

• Develop and maintain SystemVerilog testbenches and UVM verification environments from specification through silicon validation.
• Define and track functional coverage, assertion checks, and regression suites to ensure design completeness.
• Integrate and run simulations using tools such as Questa, ModelSim, or Xcelium, analyzing results and debugging issues.
• Collaborate with design and embedded software teams to resolve verification failures and improve design for testability.
• Automate verification workflows and data analysis using Python or similar scripting languages.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 3+ years of FPGA verification experience.
• Proficiency in SystemVerilog and UVM methodology, including stimulus generation, scoreboarding, and coverage modeling.
• Hands‑on experience with FPGA development flows and simulation tools (Questa, ModelSim, Xcelium, etc.).
• Strong debugging skills and ability to interpret waveforms, logs, and coverage reports.
• Familiarity with Python scripting for automation and data processing.