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DFT Engineer - Google
Software Engineer
Design-for-Test Engineer with 3+ years of experience creating DFT architectures, ATPG flows, and verification solutions for complex SoCs, leveraging ATE, MBIST, JTAG, and system‑level test methodologies.
About the role
Key Responsibilities
- Develop and implement DFT architectures for high‑performance SoCs, including test controllers, TAP, and MBIST integration.
- Design and optimize Automatic Test Pattern Generation (ATPG) strategies to achieve coverage goals and reduce test time.
- Validate DFT implementations through comprehensive verification, simulation, and silicon bring‑up activities.
- Collaborate with hardware design, synthesis, and physical design teams to ensure testability constraints are met throughout the flow.
- Utilize industry‑standard test platforms such as Automated Test Equipment (ATE), JTAG, and System Level Test (SLT) to develop test programs and debug failures.
- Document DFT flow, generate test specifications, and provide guidance to cross‑functional teams on test methodology best practices.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (Master's/PhD preferred).
- Minimum 3 years of hands‑on experience with DFT architecture, ATPG, and verification for complex SoCs.
- Proficiency with test methodologies and platforms such as ATE, MBIST, JTAG, and System Level Test.
- Strong understanding of test architecture, IP integration, and interaction with synthesis tools.
- Excellent problem‑solving skills and ability to work collaboratively in a multi‑disciplinary environment.
Skills
electrical engineering