onsite
Data Center Power & Limits Architect - Qualcomm
Software Engineer
Designs next‑generation power, thermal, and system‑limit architectures for large‑scale compute platforms, ensuring maximum sustained performance of AI/HPC workloads within strict power, cooling, and reliability constraints.
About the role
Key Responsibilities
- Define end‑to‑end power and thermal management strategies for SOCs, servers, racks, and cluster‑level deployments.
- Develop system‑limit architectures that balance performance, power consumption, cooling capacity, and reliability for AI/HPC workloads.
- Collaborate with silicon, platform, and data‑center engineering teams to integrate power‑aware designs across the product stack.
- Model, simulate, and validate power and thermal behavior under real‑world workloads, providing guidance for hardware and firmware teams.
- Establish best‑practice guidelines and design rules for power budgeting, thermal envelope definition, and reliability testing.
Requirements
- Strong background in power management and thermal engineering for high‑performance computing systems.
- Experience architecting system limits for AI/HPC or data‑center scale platforms.
- Proficiency with simulation tools (e.g., CFD, SPICE, power‑budgeting tools) and data‑center infrastructure concepts.
- Demonstrated ability to work cross‑functionally with silicon, firmware, and hardware teams.
- Solid understanding of reliability engineering and safety standards in large‑scale compute environments.