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AMS Verification Engineer - Siliciom Technologies
Software Engineer
AMS Verification Engineer with 3‑6 years of IC development experience, specializing in subsystem and full‑chip AMS simulations using Cadence, Finesim, Questa ADMS, and HSPICE. Expert in analog macro verification (Buck, LDO, ADC/DAC, PLL, oscillator, bandgap, comparator) and circuit‑level debugging.
About the role
Key Responsibilities
- Execute subsystem and chip‑level AMS simulations to validate analog macro performance.
- Perform full‑chip fast‑spice simulations to ensure design integrity across the silicon.
- Utilize Cadence, Finesim, Questa ADMS, HSPICE or equivalent tools for accurate simulation and analysis.
- Review and interpret chip‑level electrical specifications for analog macros, ensuring compliance with design requirements.
- Collaborate with design and verification teams to debug and resolve circuit‑level issues.
Requirements
- BSEE minimum, MSEE preferred from an accredited engineering school.
- 3‑6 years of experience in an IC development environment.
- Proficiency in AMS simulation tools and fast‑spice analysis.
- Strong understanding of analog macro blocks such as Buck, LDO, ADC/DAC, PLL, oscillator, bandgap, and comparator.
- Experience in circuit‑level debugging and problem resolution.