remote
AI SoC Hardware Architect - Ericsson
Software Engineer
Lead the design of AI System‑on‑Chip hardware, bridging silicon architecture with AI infrastructure to deliver high‑performance, power‑efficient accelerators using ASIC and FPGA technologies.
About the role
Key Responsibilities
- Architect end‑to‑end AI SoC solutions, defining silicon block diagrams and performance targets.
- Translate AI model requirements into RTL and HLS designs, ensuring optimal area, power, and latency.
- Collaborate with cross‑functional teams (Model Engineering, AI Infrastructure, Silicon Architecture) to integrate hardware with software stacks.
- Lead silicon verification efforts, creating testbenches and leveraging EDA tools to validate functional correctness.
- Drive technology selection, including FPGA prototyping and ASIC fabrication, while managing cost and schedule constraints.
Requirements
- 5+ years of experience in ASIC/FPGA design for AI workloads.
- Proficiency in RTL (Verilog/SystemVerilog) and HLS tools.
- Strong understanding of silicon architecture, power optimization, and silicon verification.
- Experience with AI model deployment and hardware‑software co‑design.
- Excellent communication skills and ability to work in a fast‑paced, cross‑functional environment.