Enthusiastic & high energy driven professional targeting in VLSI Industry.
AI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
Creator's garage
Data Scientist
June 16, 2026 – Present
SiliconCrew-Autonomous-Hardware-Design-Agent
December 31, 2025 – Present
SiliconCrew is an agentic AI framework that automates the digital hardware design loop. It orchestrates three specialized AI agents to transform natural language specifications into functionally verified, physically realizable silicon designs.
View ProjectIR-Drop-Predictor
May 19, 2025 – Present
U-Net-based ML framework for fast and scalable IR drop prediction in VLSI PDNs using current maps, PDN density, and voltage distance features extracted from SPICE netlists.
View ProjectDriving-HSPICE-Simulations-Using-Python-for-Optimizing-Inverter-Chains
January 3, 2025 – January 3, 2025
Driving-HSPICE-Simulations-Using-Python-for-Optimizing-Inverter-Chains — GitHub repository
View ProjectIterative-Solutions-for-Diode-Circuit-Analysis-and-Parameter-Estimation
January 3, 2025 – January 3, 2025
Iterative-Solutions-for-Diode-Circuit-Analysis-and-Parameter-Estimation — GitHub repository
View ProjectMine-Detection-Using-Sonar-Data-and-Principal-Component-Analysis
January 3, 2025 – January 3, 2025
Mine-Detection-Using-Sonar-Data-and-Principal-Component-Analysis — GitHub repository
View ProjectVHDL-Ultrasonic-Car-Parking-Sensor
January 13, 2023 – January 13, 2023
Implemented an ultrasonic sensor to measure and visualize distances on the Nexys 4 DDR FPGA 7-seg Display and LEDs. Incorporated a buzzer that sounds according to proximity by using a single multiplexed clock signal. Please note that the sensor needs 5V and the Nexys 4 is only able to give 3.3V. Use a booster or an external power supply.
View ProjectDesign-of-a-Cricket-Game-Using-FPGAs
January 13, 2023 – January 13, 2023
Within this project, we have broken down our approach to implementing a realistic cricket game onto a Basys 3 FPGA board, Using Verilog.
View ProjectMini_Verilog_Projects
June 8, 2022 – June 8, 2022
Mini_Verilog_Projects — GitHub repository
View ProjectImage_Processing_using_Verilog
May 30, 2022 – May 30, 2022
In this FPGA Verilog project, some simple processing operations are implemented in Verilog such as inversion, brightness control and threshold operations. The image processing operation is selected by a file and then, the processed image data are written to a bitmap image for verification purposes. The image reading Verilog code operates as a Verilog model of an image sensor/ camera, which can be really helpful for functional verifications in real-time FPGA image processing projects. The image writing part is also extremely useful for testing as well when you want to see the output image in BMP format.
View ProjectWashing_Machine_Automatic_HDL
May 26, 2022 – May 26, 2022
A Washing Machine has been implemented using Verilog HDL on Xilinx ISE.
View ProjectCultural Fit Analysis
The candidate's project portfolio shows a strong inclination towards hardware description languages (Verilog, VHDL) and VLSI design, alongside data science projects. While the data science projects align with the target role, the significant focus on hardware design might indicate a broader interest beyond pure data science, or a transition in career focus. The 'SiliconCrew-Autonomous-Hardware-Design-Agent' project, combining AI with hardware design, shows an interdisciplinary approach. The candidate's experience level is listed as 0, which contradicts the current Data Scientist role, suggesting a potential data discrepancy or a very recent entry into the role. This makes it difficult to fully assess cultural fit without more context on career trajectory and specific interests.
Soft Skills & Operational Fit
Insufficient data to assess soft skills and operational fit. No psychometric test results or interview feedback provided.