Utkarsh Mahajan

FPGA Developer

https://www.opentalent.in/utkarsh-mahajan-2

IndiaMember since June 24, 2026

Key Strengths

Strong foundational knowledge in FPGA development with projects like 'Password-Cracker-On-FPGA' and 'RDNA2-Compute-Unit'.
Extensive experience with Verilog and SystemVerilog, directly aligning with the FPGA Developer role.
Demonstrated ability to work on complex hardware description language (HDL) projects, including GPU architecture and packet processing units.
Exposure to VHDL and Assembly, indicating a broader understanding of hardware design principles.

Cultural & Operational Fit

Cultural Fit Analysis

The candidate's project portfolio shows a strong focus on personal, technically challenging projects, indicating a self-driven and curious individual. However, the lack of team-based projects or diverse domain experience outside of hardware/low-level systems might suggest a preference for individual contributions. The target role 'FPGA Developer' aligns well with the candidate's demonstrated technical interests.

Soft Skills & Operational Fit

Insufficient data to assess soft skills or operational fit. No psychometric test results or interview feedback provided.

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Projects

TotalOverDoseRTXRemix

June 1, 2026 – Present

TotalOverDoseRTXRemix — GitHub repository

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fpga-based-packet-processing-unit

April 4, 2024 – January 20, 2025

:) Everything has been dumped. Feel free to dig and grab out what you need.

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Staging-Server

January 8, 2024 – Present

A Django based web platform designed to streamline the deployment and testing of dockerized web applications.

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mariadb-ebpf-exporter

August 21, 2023 – September 23, 2023

eBPF based prometheus Exporter for mysql/mariadb query latencies.

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Password-Cracker-On-FPGA

October 5, 2022 – April 3, 2023

This project aims to implement a password cracker on FPGA with Verilog HDL.

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TRINIT_SCRIPTKIDDIES_DEV

January 29, 2022 – January 30, 2022

TRINIT_SCRIPTKIDDIES_DEV — GitHub repository

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ieee-eureka-22

December 20, 2021 – January 10, 2022

Node(Ejs) Based CTF type platform for hosting IEEE-NITK's Eureka 2022 final event.

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cms-api

September 12, 2021 – October 18, 2021

for managing college events/competitions

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RDNA2-Compute-Unit

August 24, 2021 – November 25, 2022

This project aims to recreate the RDNA2 Compute Unit found in AMD's RX6000 series GPUs

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Utkar5hM

June 22, 2021 – July 13, 2025

Utkar5hM — GitHub repository

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Key Strengths

Strong foundational knowledge in FPGA development with projects like 'Password-Cracker-On-FPGA' and 'RDNA2-Compute-Unit'.
Extensive experience with Verilog and SystemVerilog, directly aligning with the FPGA Developer role.
Demonstrated ability to work on complex hardware description language (HDL) projects, including GPU architecture and packet processing units.
Exposure to VHDL and Assembly, indicating a broader understanding of hardware design principles.

Cultural & Operational Fit

Cultural Fit Analysis

Soft Skills & Operational Fit

Insufficient data to assess soft skills or operational fit. No psychometric test results or interview feedback provided.

Utkarsh Mahajan

Key Strengths

Cultural & Operational Fit

Top Skills

Skills

Projects

Key Strengths

Cultural & Operational Fit