Data Scientist & AI Builder | Python · ML · Django · Docker | Shipped live products · SIH 2025 | BTech CS @ SRMU
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MMU-Design-Verilog-HDL
June 20, 2026 – Present
Industry-oriented Memory Management Unit (MMU) design using Verilog HDL. Implements virtual to physical address translation, page table logic, permission checking, fault handling, RTL simulation, waveform verification and FPGA-ready architecture.
View ProjectLow-Power-ALU-Verilog-VLSI
June 20, 2026 – Present
Industry-oriented Low Power ALU design using Verilog HDL with RTL implementation, simulation, waveform analysis, synthesis flow, and Streamlit dashboard visualization.
View ProjectFPGA-Traffic-Light-Controller
June 19, 2026 – Present
FPGA-Based Traffic Light Controller designed using Verilog HDL and FSM architecture. Includes RTL design, testbench verification, Icarus Verilog simulation, waveform analysis, FPGA implementation flow, and a Streamlit dashboard for interactive traffic signal visualization.
View Projectsmart-waste-management-iot-system
June 14, 2026 – Present
IoT-based Smart Waste Management System using Python, Flask, and AI simulation. It provides real-time bin monitoring, live dashboard with charts, AI prediction of bin fill levels, and smart city map visualization for optimized waste collection.
View ProjectSmart-Home-Energy-Monitoring-System
June 14, 2026 – Present
IoT-based Smart Home Energy Monitoring System using ESP32, Energy Analytics, CSV Logging, PDF Reporting, Dashboard Integration and Real-Time Power Consumption Monitoring.
View ProjectIoT-Air-Quality-Pollution-Monitoring-Dashboard
June 14, 2026 – Present
Advanced IoT Air Quality Pollution Monitoring Dashboard using Python, Flask, Plotly, Pandas, and CSV logging with AQI gauge meter, real-time charts, alert system, and interactive analytics dashboard.
View ProjectIoT-Vehicle-Tracking-Theft-Prevention-System
June 13, 2026 – Present
An IoT-based Vehicle Tracking and Theft Prevention System using Python, Streamlit, MQTT, GPS Simulation, Geofencing, ThingSpeak, and Blynk for real-time vehicle monitoring, route tracking, theft detection, cloud integration, and dashboard analytics.
View ProjectMedi-Locator
April 5, 2026 – Present
A dual-sided medicine availability portal built with Django — map-based pharmacy discovery, real-time medicine requests broadcast to all nearby shops, and direct user-pharmacy contact. Shipped as live MVP in 10 weeks.
View Project-supply-chain-env
April 4, 2026 – Present
python fastapi docker ai-agent supply-chain reinforcement-learning benchmark openai-gym
View ProjectCultural Fit Analysis
The candidate's project portfolio shows a strong focus on hardware description languages (Verilog) and embedded systems/IoT, which aligns well with an FPGA Developer role. The diversity of projects, ranging from MMU design to IoT systems, indicates a broad technical curiosity. However, the projects are predominantly personal, and there is no information on collaborative work environments or team contributions, making a full cultural fit assessment challenging.
Soft Skills & Operational Fit
The candidate's project descriptions indicate an ability to deliver functional prototypes (e.g., Medi-Locator MVP in 10 weeks) and integrate various technologies. The use of Streamlit for visualization in hardware projects suggests an inclination towards presenting complex technical work clearly. However, without specific psychometric or English test results, a detailed assessment of communication, teamwork, and stress handling is not possible.