Sandeep Vidyashankar
Data AnalystAI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
AI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
Staff Engineer at Qualcomm in RF PTE; Honing my skills in Deep Learning & exploring its implementation and applications. RF + AI fascinates me
• Staff Engineer at Qualcomm • Interested in AI / Deep Learning and its applications / Implementations in various fields • RF + AI & Deep Learning Intrigues me • Acquiring more knowledge on Machine Learning, Neural Networks and Deep Learning through online Courses / Certifications. • Trained in Computer Architecture, CPU, GPU, SSD, NAND Flash, DRAM architectures and Performance verification, Familiar with Intel and Nvidia GPU architectures, Scientific computing and techniques to improve system Cache memory • Worked on Data Mining and Test Time Reduction at Qualcomm • Master's In Digital Signal Processing • Research in FPGA Fixed Point Implementation of Data Processing Algorithms • Pursuing my Research in Brain Computer Interface ,Data Mining of the Brain Signal and Brain Signal Processing • Published a paper titled "On-Chip Implementation of ECoG Signal Data Decoding in Brain-Computer Interface" at the 21st International Mixed-Signal Testing Workshop held in Spain • Spent fair amount of time in Speech processing , Synthetic Music generation and Text to Speech Technology
San Diego State University
Master’s Degree, Digital Signal Processing
January 1, 2014 – January 1, 2016
KSSEM/VTU
Bachelor’s Degree, Electrical, Electronics and Communications Engineering
January 1, 2010 – January 1, 2014
Qualcomm
Staff Engineer
December 1, 2023 – Present
Qualcomm
Senior Engineer
June 1, 2016 – January 1, 2024
Qualcomm
Test Time Reduction Engineer at Qualcomm
June 1, 2015 – August 1, 2015
San Diego County, California, United States
Global Change Research Group
Data Processing Intern
January 1, 2015 – January 1, 2016
San Diego County, California, United States
San Diego State University
Research in FPGA Implementation (Fixed Point) of Data Mining and Machine Learning Algorithms
August 1, 2014 – January 1, 2017
San Diego County, California, United States
Bosch
PLC Design Engineer
January 1, 2014 – June 1, 2014
Bengaluru, Karnataka, India
Design of a 90-Ohm differential line for High Speed Data Transfer across a Motherboard.
November 1, 2015 – Present
The project included three parts 1)Design of a Loosely and Tightly coupled Differential line by obtaining the spacing and width from Rogers Tool and comparing with PCBCalc and LineCalc(ADS). 2)Maxwell 2-D simulator was used to extract P.U.I inductance and capacitance and to plot even/odd mode excitation's. 3)Differential lines were simulated in Advanced Design system(ADS) to generate Eye-Diagrams.
Design of an Adaptive Equalizer and Canceller using the LMS Algorithm on a QPSK Signal which is corrupted form another QPSK Signal
November 1, 2015 – December 1, 2015
Designed an Equalizer to invert the effect of the communication path and a Canceller to remove the effect of the cross talk between the two QPSK Signals both using a Decision Directed Adaptive LMS Algorithm
Efficient Verilog Implementation of finding LOG of any number to any base without using division operator
September 1, 2015 – Present
Implemented an Hardware Efficient algorithm in Verilog which computes LOG of any number to any given base without the use of division or square root operators.
Design and implementation of an 16 QAM SC-OFDM MODEM LTE in MATLAB and Verifying its Efficiency for Noisy and noiseless Channel
December 1, 2014 – Present
This project involved designing an 16QAM SC-OFDM-LTE Modem and to verify its working for different given conditions and to test its efficiency
Cleaning Up of an audio File With Random Noise
November 1, 2014 – Present
The project involved cleaning up of an audio file which contained random color noise that distorted the audio file. Their frequencies and pattern had to be identified closely to remove them
Design and implementation of an 16 QAM OFDM MODEM IEEE 802.11 in MATLAB and Verifying its Efficiency for Noisy and noiseless Channel
October 1, 2014 – Present
This project involved designing an 16QAM OFDM Modem IEEE 802.11 and to verify its working for different given conditions and to test its efficiency
Design and implementation of a Multi-Channel Digital Down Converter to channelize 7 QAM Signals
May 1, 2014 – Present
Designed different types of Digital Down converters to check for their efficiency, Hardware requirements and performance. Types of Digital Down converters include : 1. Down converting each channel to Base Band and then filter the baseband signals using pair of FIR Filters 2. Implemented a 8 path PolyPhase FIR Filter performing 8-to-1 downsampling 3. Down converting each channel to Base Band and then filter the baseband signals using pair of IIR Linear Phase Low Pass Filters 4. Implemented a 8 path PolyPhase IIR Filter performing 8-to-1 downsampling
Data Mining Research of Brain Signal Using Neural Network Tool Box for Brain Signal Processing
January 1, 2014 – Present
Applied Neural Network analysis using the Neural Network tool box on Ecog Data Collected using Brain Computer Interface.
Upgradation of PLC ,Vision Camera and Bolting System at BOSCH INDIA LTD.
January 1, 2014 – Present
Coding the PLC to our needs and to maintain synchronization between the PLC ,vision Camera and the bolting system and to completely automate the entire chain to minimize human involvement and reduce human error.
NEAR FIELD COMMUNICATION
April 1, 2013 – Present
I was part of this paper which was presented at "National Conference on Advanced Communication,VLSI Design and Signal Processing(NCCVS)"
Using Python to Access Web Data
Coursera
June 24, 2026 – Present
Python For Data Structures
Coursera
June 24, 2026 – Present
Machine Learning
Coursera
June 24, 2026 – Present
Neural Networks and Deep Learning
Coursera
June 24, 2026 – Present
Python
Coursera
June 24, 2026 – Present
Cultural Fit Analysis
The candidate's project portfolio is heavily skewed towards electrical engineering, signal processing, and hardware implementation (FPGA, Verilog, RF). While there are elements of data processing and data mining, the overall profile does not strongly align with a typical 'Data Analyst' role which often requires strong business acumen, statistical modeling, and proficiency in tools like SQL, Python (for data analysis libraries), R, and visualization tools. The certifications in Python and Machine Learning are positive but lack practical application details in the resume. The experience is primarily in a hardware/RF engineering context, which may require a significant shift in focus for a pure data analyst position.
Soft Skills & Operational Fit
The candidate's project descriptions indicate a problem-solving approach and a focus on efficiency (e.g., 'Reduction in Test time', 'Hardware Efficient algorithm'). The experience at Qualcomm suggests an ability to work in a structured engineering environment. However, specific soft skills like teamwork, leadership, or adaptability are not explicitly detailed in the provided data.