Harris
FPGA DevelopershanghaiMember since June 26, 2026
AI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
AI is analyzing your overall score…
Identifying your key strengths…
Evaluating your skill match against the job requirements…
Assessing your cultural and operational fit
zmq_capnp_benchmark
August 22, 2025 – August 22, 2025
compare serial and non-serial; compare zmq and raw socket
View Projectipc-benchmarks
December 24, 2024 – December 24, 2024
benchmarks example for serveral libraries
View ProjectDPI-C
May 17, 2017 – July 4, 2020
translate the dpic part of IEEE std 1800-2012 (System Verilog)
View ProjectCultural Fit Analysis
The candidate's projects show a strong inclination towards low-level programming, system tools, and hardware interaction, which aligns with the technical demands of an FPGA Developer role. However, the projects are all personal and lack team collaboration or larger system integration examples, which might indicate a preference for individual contributions or a lack of experience in collaborative environments. The diversity of technologies used (C++, Go, Verilog, Shell, HTML/CSS) suggests a broad interest, but the depth in specific FPGA-related frameworks or industry-standard practices is not evident from the project descriptions alone. The experience level is stated as 0, which suggests this candidate is likely entry-level despite the technical project list.
Soft Skills & Operational Fit
Insufficient data to assess soft skills or operational fit. No psychometric or English test scores were provided.