Guilhem Fauré

FPGA Developer

https://www.opentalent.in/guilhem-faure

Apprentice @ French Navy and Polytech, obsessive curious and self-learner. Interested in free-software and software that empowers freedom, systems, embedded dev

Guilhem FAURE

Key Strengths

Demonstrated interest in FPGA development through the 'de-jdr-verilog' project, which directly aligns with the target role.
Experience with Verilog, a core language for FPGA development.
Proficiency in Nix, indicating a strong understanding of reproducible build environments and system configuration, which can be beneficial in complex hardware development workflows.
Experience with C++ and low-level programming, which is often relevant for embedded systems and hardware interaction.

Cultural & Operational Fit

Cultural Fit Analysis

The candidate's projects are primarily personal and demonstrate a strong inclination towards open-source tools and system configuration (Nix). This suggests a self-starter who values reproducibility and control over their development environment. The diversity of projects, from workout logging to a snake game, indicates a broad interest in technology, but the direct relevance to the 'FPGA Developer' target role is limited to one project. The candidate's experience is listed as 'FPGA Developer' starting in 2026, which is in the future, making it difficult to assess current cultural fit based on actual professional experience.

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. No psychometric test results or interview feedback are available.

AI is analyzing your overall score…

Identifying your key strengths…

Evaluating your skill match against the job requirements…

Assessing your cultural and operational fit

Projects

titsh

May 22, 2026 – Present

Evidence based learning and memorization app

View Project

nix-agents-jail

March 26, 2026 – Present

A Nix flake based jail for Agents

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java-exercises-polytech

March 10, 2026 – Present

Java Exercises at Polytech (mostly for IDEA OSS build)

View Project

LogOut

February 17, 2026 – Present

Turn off your PC, log your workout (simple, efficient, cross-platform workout logging app)

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de-jdr-verilog

November 28, 2025 – November 29, 2025

Un Dé (4, 6, 8, 10, 12, 20, 30, 100) numérique conçu en Verilog, ciblant le kit DE2-115

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polytech-gl-tp-3

November 1, 2025 – November 21, 2025

polytech-gl-tp-3 — GitHub repository

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sql-workshop-polytech

May 12, 2025 – June 9, 2025

SQL basics workshop, Polytech Tours exercise

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snake-ng

March 24, 2025 – April 10, 2025

A snake game implemented in C with SDL3.

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nixos-config

March 6, 2025 – Present

NixOS Flake Configuration

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Neutral-Zola-Theme

June 26, 2023 – May 16, 2025

A neutral base for very specific Zola sites.

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Key Strengths

Demonstrated interest in FPGA development through the 'de-jdr-verilog' project, which directly aligns with the target role.
Experience with Verilog, a core language for FPGA development.
Proficiency in Nix, indicating a strong understanding of reproducible build environments and system configuration, which can be beneficial in complex hardware development workflows.
Experience with C++ and low-level programming, which is often relevant for embedded systems and hardware interaction.

Cultural & Operational Fit

Cultural Fit Analysis

Soft Skills & Operational Fit

Insufficient data to assess soft skills and operational fit. No psychometric test results or interview feedback are available.

Guilhem Fauré

Key Strengths

Cultural & Operational Fit

Top Skills

Skills

Experience

Projects

Key Strengths

Cultural & Operational Fit