I completed my bachelor's degree in ECE from Sharda University in 2023. I completed a training program at Pine Training Academy, in design and verification.
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tcp-ip-and-udp-projects-
February 13, 2025 – February 13, 2025
tcp-ip-and-udp-projects- — GitHub repository
View ProjectMemory-Model-Verification-with-C-
January 14, 2025 – January 14, 2025
Memory-Model-Verification-with-C- — GitHub repository
View ProjectVerification-of-a-Simple-ALU-Design-in-Cpp
January 14, 2025 – January 14, 2025
This project implements and verifies a Simple ALU in C++. Users select operations like addition, subtraction, bitwise AND/OR, 1's/2's complements, and shifts. Arithmetic/logical results are in decimal; complements in binary. Modular design (alu.h, alu.cpp, testbench.cpp) enhances learning of ALU concepts, modular coding, and user interaction.
View ProjectAutomating-User-Management-Tasks-using-python-
January 10, 2025 – January 11, 2025
This Python-based User Management System provides functionalities to manage user accounts, including adding, deleting, listing users, password management (forgot/reset, expiry check), and backup/restore operations. It simplifies administrative tasks, enhances efficiency, and ensures seamless user account handling.
View ProjectAUTOMATING-USER-MANAGEMENT-TASKS
September 9, 2024 – September 9, 2024
Developed Bash scripts to automate the creation of new user accounts, including default password generation and removal of unnecessary accounts. o Improved Bash scripting skills for user account management by utilizing commands such as userdel, adduser, passwd, select, and read
View ProjectAUTOMATING-USER-MANAGEMENT-TASKS-WITH-BASH-SCRIPTING
July 7, 2024 – July 7, 2024
AUTOMATING-USER-MANAGEMENT-TASKS-WITH-BASH-SCRIPTING — GitHub repository
View ProjectAPB-PROTOCOL
July 7, 2024 – July 22, 2024
Designed and implemented an Advanced Peripheral Bus (APB) in Verilog and developed a comprehensive testbench to verify read, write, and slave error operations, gaining expertise in APB modes and functionality.
View ProjectDYNAMIC-TRAFFIC-LIGHT-CONTROLLER
July 7, 2024 – July 7, 2024
This project implements a dynamic traffic light controller using Verilog/SystemVerilog for FPGA/CPLD platforms. It simulates a real-world traffic scenario with varying traffic densities and adjusts signal timings accordingly.
View Project100-days-of-HDL-CODING
June 23, 2024 – August 13, 2024
I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.
View ProjectCultural Fit Analysis
The candidate's project portfolio is diverse, spanning scripting, low-level programming, and hardware design. This breadth of interest suggests adaptability and a willingness to learn new technologies. While many projects lean towards embedded systems and hardware, the Python and C++ projects show transferable skills relevant to a Backend Engineer role. The focus on personal projects indicates a self-starter mentality, which can be a positive cultural fit for teams valuing initiative. However, the lack of team-based projects or professional experience makes it difficult to fully assess collaboration and broader cultural alignment.
Soft Skills & Operational Fit
The candidate's project descriptions indicate a proactive and self-driven approach to learning and project execution. The variety of personal projects suggests an ability to work independently and explore different technical domains. However, without formal assessment data (e.g., psychometric test results), it is difficult to assess specific soft skills like teamwork, stress handling, or communication clarity in a professional context.